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FMC262

Quad ADC 14-bit @ 3 GSPS with AD9208 or 2.6 GSPS with AD9689 FMC+

  • Quad ADC 14-bit @ 3 GSPS utilizing AD9208 or 2.6 GSPS with AD9689
  • FPGA Mezzanine Card (FMC+) per VITA 57.4
  • Clock input for synchronization via front or rear
  • Direct RF clock capable

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The FMC262 is an FMC+ per VITA 57.4 specification. The FMC262 has a dual AD9208 or AD9689 device to provide Quad ADC. The AD9208 is a 14-bit @ 3 GSPS ADC and the AD9689 is a 14-bit @ 2.6GSPS.

The module has a dual clock input via front panel which allows synchronization to the external clock. One of the clock inputs could be a direct RF clock which will bypass the onboard PLL to be routed directly as the ADC sampling clock.

The FMC262 allows the synchronization clock to also come from the FPGA carrier via the FMC+ connector.

Key Features
  • Quad ADC 14-bit @ 3 GSPS utilizing AD9208 or 2.6 GSPS with AD9689
  • FPGA Mezzanine Card (FMC+) per VITA 57.4
  • Clock input for synchronization via front or rear
  • Direct RF clock capable
Benefits
  • High dynamic range for versatility
  • Ideal for Broadband communications systems, Wireless infrastructure, LTE, 3G/4G, TD-SCDMA, W-CDMA, etc.
  • Compatible with a broad range of Xilinx- and Altera-based FMC+ carriers from VadaTech and others
  • Electrical, mechanical, software, and system-level expertise in house
  • Full system supply from industry leader
  • AS9100 and ISO9001 certified company
Specifications
Specifications

Block diagram

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