VPX337

The VPX337 provides a complete, feature-rich, GPS/PTP (1588)/IRIG/NTP bus-level timing solution to a VPX system, with exceptional flexibility.

The onboard GPS receiver, or 1PPS, or Inter-Range Instrumentation Group (IRIG) input, is used to discipline the local oscillator and cancel out any oscillator drift or aging. Precision UTC timestamps and GPS location/time/status are all made available via PCIe registers to the host CPU/application. Time trigger output and time event interrupts synchronized to GPS UTC are available under host control. GPS location/time/status data is Broadcast/Unicast output via backplane Ethernet with selectable bonding/failover behavior.

The board can demodulate IRIG Amplitude Modulated (AM) signals and receive/transmit IRIG DC Level Shift (DCLS) signals. The disciplined clock, 1PPS, divided-down clocks, IRIG DCLS, and time trigger may be output in any combination to the dual clock options on the VPX backplane channels (P0_REF_CLK+/- and/or P0_AUX_CLK+/-). It also acts as a Grand-Master Clock/Clock Bridge between GPS/PTP (1588)/IRIG/NTP to provide enhanced flexibility to your system design. The board also supports Synchronous Ethernet (SyncE) to eliminate clock drift at the Ethernet PHY level.

A back-up battery or SuperCap provides non-volatile storage of the Almanac, Ephemeris and last position data to enable rapid “warm start” re-acquisition, usually within 35 seconds.

The module’s console is available via front serial or SSH via Ethernet. Locking/holdover status is also available via IPMI sensors. A secondary serial port enables GPS NMEA data in/out.

The module interfaces to the backplane via multiple options. Dual GbE to Ports 14 and 15 as dual PCIe x4 to Ports 0-7 or as 10GbE (XAUI) to Ports 0-7. The module can drive the dual VPX clocks that are on the P0.