VME599

Quad ADC @ 3.2 GSPS or Dual ADC @ 6.4 GSPS, FPGA Kintex UltraScale

  • VME open standard form factor
  • FPGA Xilinx UltraScale™ XCKU115
  • ADC based on TI ADC12DJ3200
    • Quad 3.2 GSPS or Dual 6.4 GSPS
  • Dual 10GbE to FPGA
  • Dual bank of x64 DDR-4 and Single bank of x32 DDR-4 to FPGA
  • GbE to FPGA
  • Quad Core ARM CortexA53 at 1.6GHz per core
  • GbE to ARM
  • 4GB x32 DDR4 to ARM
  • LVDS to backplane to P0

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The VME599 provides dual ADC sampling rates of up to @6.4GSPS at a 12-bit resolution TI ADC12DJ3200 or quad inputs at @3.2GSPS (or dual ADC12DJ2700 for two channels @5.4GSPS or four channels @2.7GSPS).

The unit has an onboard, re-configurable UltraScale+™ XCKU115 FPGA that directly interfaces with ADC and three banks of DDR4 memory channels. This allows for large buffer sizes to be stored during processing as well as for queuing the data to the host. The Dual 64-bit wide DDR-4 bank has total of 16 GByte and the single bank of 32-bit DDR-4 has 4GByte

The VME599 have on board wide-band PLL which provides the RF sampling clock to the ADC parts (both ADC receive the same sampling clock). This PLL can lock into an external clock and has hitless switching and holdover between the two input clocks. 

The module has dual 10GbE and single GbE to the FPGA. This allows digitized data to be transferred in real time to external host.

The on-board quad core ARM processor provides flexibility to monitor an manage the FPGA. The CPU can load the FPGA image via PCIe. The onboard CPU monitors all the temperature sensors which can provide real time data to an external host. The CPU has 4GByte of memory as well and SDHC socket and a 64GByte of Flash to boot and store data.

The module takes power from P1 but does not implement VME bus transactions. Further from the FPGA there is 40 LVDS pairs that are routed to P0.

This makes VME599 suitable for signal capture/analysis applications such as COMINT/SIGINT, radar, research and instrumentation.

 

Key Features
  • VME open standard form factor
  • FPGA Xilinx UltraScale™ XCKU115
  • ADC based on TI ADC12DJ3200
    • Quad 3.2 GSPS or Dual 6.4 GSPS
  • Dual 10GbE to FPGA
  • Dual bank of x64 DDR-4 and Single bank of x32 DDR-4 to FPGA
  • GbE to FPGA
  • Quad Core ARM CortexA53 at 1.6GHz per core
  • GbE to ARM
  • 4GB x32 DDR4 to ARM
  • LVDS to backplane to P0
Benefits
  • Sampling rate >6 GSPS for IF radar and EW applications
  • Xilinx UltraScale™ XCKU115 FPGA provides powerful compute resource
  • Flexible FPGA booting and module control via the I.MX8M Mini
  • Electrical, mechanical, software, and system-level expertise in house
  • AS9100 and ISO9001 certified company
  • Full system supply from industry leader
Specifications
Specifications

Block diagram

Related Products

AMC599

Dual ADC @ 6.4 GSPS and Dual DAC @ 12 GSPS, UltraScale, AMC

  • Xilinx UltraScale™ XCKU115 FPGA
  • Dual ADC 12-bit @ 10.4/6.4 GSPS or quad ADC @ 5.2/3.2 GSPS with TI ADC12DJ5200 or ADC12DJ3200
  • Option for ADC12DJ5200, ADC12DJ3200 or ADC12DJ2700
  • Dual DAC 16-bit @12 GSPS (AD9162 or AD9164)
  • Two banks of 64-bit wide and a single bank of 32-bit wide DDR4 for a total of 20 GB
  • AMC Ports 4-11 are routed to FPGA per AMC.1, AMC.2 and AMC.4 (protocols such as PCIe, SRIO, 1/10/40GbE, etc. are FPGA programmable)
  • AMC FCLKA, TCLKA, TCLKB, TCLKC and TCLKD are routed
  • Clock jitter cleaner
  • IPMI 2.0 compliant
View product AMC599 Data Sheet

CP218

24 Port cPCI Managed Layer Two Switch

  • Compact PCI (cPCI) compliant
  • Managed Layer two switch
  • 24 ports (double slot)
  • 12 ports of 10/100/1000 via RJ-45
  • 12 Ports via Small Form-factor Pluggable (SFP)
  • Support up to 8K MAC address
  • 4K IEEE 802.1Q VLANs
  • VLAN-based packet filtering
  • Packet classification using IEEE802.1p QoS
  • 9K Jumbo frames
View product CP218 Data Sheet

VPX599A

Dual ADC @ 6.4 GSPS and Dual DAC @ 12 GSPS, UltraScaleā„¢, 3U VPX

  • 3U FPGA Dual ADC and Dual DAC per VITA 46
  • Xilinx Kintex UltraScale™ XCKU115 FPGA
  • Dual ADC 12-bit @ 6.4 GSPS or quad ADC at 3.2 GSPS with TI ADC12DJ3200
  • Option for ADC12DJ3200 or ADC12DJ2700
  • Dual DAC 16-bit @ 12 GSPS (AD9162 or AD9164)
  • High-performance clock jitter cleaner
  • VHDL reference design with source code
  • Protocols such as PCIe, SRIO, 10GbE/40GbE, etc. are FPGA programmable
  • Dual bank 16 GB of DDR4 Memory total (64-bit wide)
  • Health Management through dedicated Processor
View product VPX599A Data Sheet

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