Description

The VPX586 is a 3U VPX FPGA Carrier with single FMC+ (VITA 57.4) interface. The unit has an onboard, re-configurable FPGA which interfaces directly to the VPX P1 and P2 connectors and all FMC+ LA/HA/HB pairs (the module does not support HSPCe connector).

The VPX586 is based on Xilinx UltraScale+ XCZU19EG MPSoC FPGA with single FMC+ site. The FPGA has 1968 DSP Slices and 1143k logic cells. The XCZU19EG includes a quad-core ARM application processor, a dual-core ARM real-time processor and a Mali™ graphics processing unit, as well as over 34.6 Mb of block RAM and 36 Mb of UltraRAM.

The FPGA has interface to a single DDR4 memory channel (64-bit wide with ECC) to the ARM CPU, and two 4 GB banks of DDR4 memory channel (32-bit wide) to the Programmable Logic. This allows for large data sizes to be stored during processing and supports ping-pong buffering for data streaming applications.

16 lanes of high-speed SERDES (GTH) are routed to P2 for I/O expansion. These are supported by GPIO (x12 LVDS or x24 single-ended) that could be used for control and monitoring of offboard transceivers connected to the SERDES.

The module has onboard 64 GB of Flash, 128 MB of boot flash.