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5.4 GSPS ADC @ 12-bit and 6 GSPS DAC @ 12-bit, Virtex UltraScale+, 3U VPX

  • 12-bit ADC at 5.4 GSPS using EV12DS460A
  • 12-bit DAC at 6 GSPS using EV12AS350A
  • Xilinx UltraScale+ XCVU13P FPGA with 8 GB DDR4
  • Health Management through dedicated Processor

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The VPX570 provides an ADC supporting rates up to 5.4 GSPS and a DAC supporting rates up to 6 GSPS, both at 12 bits. The EV12DS460A and EV12AS350A both have parallel interfaces to the FPGA, avoiding latency associated with serializing/deserializing data. The XCVU13P FPGA has large 360 Mb on-chip UltraRAM which, with the ADC and DAC selection, makes this module ideal for low-latency applications such as DRFM, radar simulators and smart jammers.

The FPGA interfaces directly to rear I/O via SERDES and LVDS, supporting PCIe, SRIO, GbE/10GbE/40GbE or Aurora backplane connections. General purpose I/O signals, e.g. for trigger, are routed to the front panel that also contains 8 LED/Bi-color.

ADC and DAC have a common sampling clock, which can be fed from front panel (Direct RF Clock) or from PLL locked to a 10/100 MHz reference clock sourced from front panel or backplane. Sampling clock selection is by ordering option.

The VPX570 includes platform health management/monitoring capability using VadaTech’s field-proven IPMI software. An on-board management controller has the ability to access board sensors and manage FPGA image updates.

The unit is available in a range of temperature and shock/vib specifications per ANSI/VITA 47, up to V3 and OS2.

Key Features
  • 12-bit ADC at 5.4 GSPS using EV12DS460A
  • 12-bit DAC at 6 GSPS using EV12AS350A
  • Xilinx UltraScale+ XCVU13P FPGA with 8 GB DDR4
  • Health Management through dedicated Processor
Benefits
  • Very low latency from ADC to DAC
  • XCVU13P has large internal memory
  • Reference design with VHDL source code speeds application development
  • Full system supply from industry leader
  • AS9100 and ISO9001 certified company
Specifications
Specifications

Block diagram

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