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3rd Generation RFSoC w/ XCVU13P FPGA and RF/IF carrier

NEW
  • 8 ADC / 8 DAC simultaneous processing
  • 3rd Generation Xilinx RFSoC ZU47DR
    • 16GB of DDR4
  • Suitable for 5G, 4G, LET and SDR deployment
  • FPGA data processing w/ Xilinx Virtex UltraScale+ XCVU13P
    • 16GB of DDR4
  • FMC+ socket for addition RF and I/O
    • The FMC+ could extend beyond the FMC+ in length for added real estate (up to XMC size is supported) 
  • Accommodate 3rd party RF/IF daughter card
    • Accomplished thru an FMC connector to the RF Module
  • Clock and Timing Synchronization to the RF/IF

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The VT981 is a complete data acquisition and processing platform capable of synchronous sampling, suitable for customer development of custom RF front end. It has 8 channels ADC and 8 channels DAC embedded in the 3rd generation RFSoC XCVU47DR with bandwidth up to 800MHz from DC to 6GHz. The RFSoC provides clock and frame synchronization signals to the RF/IF Daughter Card, the DSP FPGA, and external Control Module.

The RFSoC has 8GB 64-bit DDR4 with ECC to the CPU and 8GB 64-bit DDR4 to the Fabric side. The Xilinx ZCVU13P has 16GB 64-bit DDR4 (two banks of 8GB) on-board memory. Both XCZU47DR and the XCVU13P have JTAG and serial via the front dual USB connectors.

The RFSoC interface includes CPRI over SFP+ on the front panel and the FPGA XCVU13P supports six 100GbE interfaces via QSFP28 on the front panel.

The VT981 has a Layer 2 Managed Gigabit Ethernet Switch with dual GbE (RJ‑45) and single 10GbE (SFP+) interfaces to the front panel, providing interconnection among the subsystems.

VT981 has an option for an FMC+ module which interfaces to the VU13P FPGA. The module mounted here can be larger than the FMC+ specification to extend the area available for components, allowing up to an XMC module size. The XCVU47DR RF is routed to an interface connector with an additional FMC style connector for control to a customer RF front-end module.

The VT981 has a dedicated CPU for health management.  The health management CPU monitors the sensors in the chassis and controls the cooling dynamically. The cooling is from right to left.

The chassis mounting provision allows the unit to be in a 19” rack or ceiling mounted.

Key Features
  • 8 ADC / 8 DAC simultaneous processing
  • 3rd Generation Xilinx RFSoC ZU47DR
    • 16GB of DDR4
  • Suitable for 5G, 4G, LET and SDR deployment
  • FPGA data processing w/ Xilinx Virtex UltraScale+ XCVU13P
    • 16GB of DDR4
  • FMC+ socket for addition RF and I/O
    • The FMC+ could extend beyond the FMC+ in length for added real estate (up to XMC size is supported) 
  • Accommodate 3rd party RF/IF daughter card
    • Accomplished thru an FMC connector to the RF Module
  • Clock and Timing Synchronization to the RF/IF
Benefits
  • Design utilizes proven VadaTech subcomponents and engineering techniques
  • Electrical, mechanical, software, and system-level expertise in house
  • Full system supply by industry leader
  • AS9100 and ISO9001 certified company
Specifications
Specifications

Block diagram

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