VPX555
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Virtex and Zynq UltraScale+ FPGAs with High-speed ADC/DAC in 6U VPX
- Xilinx Virtex UltraScale+ XCVU13P FPGA
- Xilinx Zynq UltraScale+ XCZU4CG FPGA
- High speed ADC/DAC utilizing 3x AD9081
- Synchronized 12 channel DAC/ADC
- RF DAC at 12 GSPS 16-bit
- RF ADC at 4 GSPS 12-bit
- All RF thru VITA 67.2 connectors
- Multi-board synchronization
- 8 GB of DDR-4 Memory to each FPGA
- 64GB of SSD
- Health Management through dedicated Processor with Tier-2 support
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The VPX555 is a 6U VPX module with Virtex UltraScale+™ XCVU13P FPGA and a Zynq UltraScale+™ XCZU4CG FPGA in conjunction with three Analog Devices AD9081.
Each FPGA has 8 GB of DDR-4 memory. The Zynq+ PS side has a 64 GB of SSD for mass storage flash.
Each AD9081 provides four DACs at 16-bit and four ADCs at 12-bit resolution. The 12 ADCs/DACs are fully synchronized to each other. The module receives a reference clock from the backplane as well as sync signals. This allows for the creation of a phase-coherent transceiver system spanning multiple VPX blades.
The health management is based on VITA 46.11 with Tier-2 support.
The unit is available in a range of temperature and shock/vibe specifications per ANSI/VITA 47, up to V3 and OS2.
Please contact VadaTech for details of Conduction Cooled versions.
Key Features
- Xilinx Virtex UltraScale+ XCVU13P FPGA
- Xilinx Zynq UltraScale+ XCZU4CG FPGA
- High speed ADC/DAC utilizing 3x AD9081
- Synchronized 12 channel DAC/ADC
- RF DAC at 12 GSPS 16-bit
- RF ADC at 4 GSPS 12-bit
- All RF thru VITA 67.2 connectors
- Multi-board synchronization
- 8 GB of DDR-4 Memory to each FPGA
- 64GB of SSD
- Health Management through dedicated Processor with Tier-2 support
Benefits
- Electrical, mechanical, software, and system-level expertise in house
- Full system supply from industry leader
- AS9100 and ISO9001 certified company
Specifications
Block diagram
Related News
press release
March 26, 2024
VadaTech announces the VPX555, a 6U VPX module with Virtex UltraScale+™ XCVU13P FPGA and a Zynq UltraScale+™ XCZU4CG FPGA in conjunction with three Analog... Read More...
VPX516
3U FPGA Carrier for FMC, Xilinx Virtex-7, 3U VPX
- 3U FPGA carrier for FPGA Mezzanine Card (FMC) per VITA 46 and VITA 57
- Xilinx Virtex-7 690T FPGA in FFG-1761 package
- High-performance clock jitter cleaner
- VHDL reference design with source code
- Protocols such as PCIe, SRIO, 10GbE/40GbE, etc. are FPGA programmable
- Compatible with VadaTech and 3rd party FMCs
- 2.5 GB of DDR3 Memory
- Health Management through dedicated Processor
View product
VPX516 Data Sheet
VPX592
FPGA/FMC Carrier, Kintex UltraScale™, 3U VPX
- 3U FPGA carrier for FPGA Mezzanine Card (FMC) per VITA 46 and VITA 57
- Xilinx Kintex UltraScale™ XCKU115 FPGA
- High-performance clock jitter cleaner
- VHDL reference design with source code
- Protocols such as PCIe, SRIO, 10GbE/40GbE, etc. are FPGA programmable
- Compatible with VadaTech and 3rd party FMCs
- 20 GB of DDR4 Memory (2 banks of 64-bit wide, and single bank of 32-bit wide)
- Health Management through dedicated Processor
View product
VPX592 Data Sheet
VPX599
Dual ADC @ 10.4 or 6.4 GSPS and Dual DAC @ 12 GSPS, UltraScale™, 3U VPX
- 3U FPGA Dual ADC and Dual DAC per VITA 46
- Xilinx Kintex UltraScale™ XCKU115 FPGA
- Dual ADC 12-bit @ 10.4/6.4 GSPS or quad ADC @ 5.2/3.2 GSPS with TI ADC12DJ5200 or ADC12DJ3200
- Option for ADC12DJ5200, ADC12DJ3200 or ADC12DJ2700
- Dual DAC 16-bit @ 12 GSPS (AD9162 or AD9164) or TI DAC38RF82 14-bit @ 9GSPS
- High-performance clock jitter cleaner
- VHDL reference design with source code
- Protocols such as PCIe, SRIO, 10GbE/40GbE, etc. are FPGA programmable
- 16 GB of DDR4 Memory (64-bit wide)
- Health Management through dedicated Processor
View product
VPX599 Data Sheet
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