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FMC254

FMC+ Quad ADC 9-bit @ 1.3 GSPS

NEW
  • Quad ADC09SJ1300 ADC 9-bit at 1.3GSPS
  • Full-Power input bandwidth: 6GHz
  • Full-Power Input bandwidth enables direct RF sampling of up to 4GHz
  • 4 JESD204C lanes from each ADC
  • FPGA Mezzanine Card (FMC+) per VITA 57.4
  • Excellent dynamic performance
  • Front panel interface includes CLK In and Trig In

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The FMC254 is an FPGA Mezzanine Card (FMC+) per VITA 57.4 specification. The board has quad TI ADC09SJ1300 which provides 9-bit resolution at 1.3 GSPS. This ADC is ideal for light detection and ranging (LiDAR) systems.

The FMC254 provides four single ADC to allow interleaving among the four ADC. This is accomplished by skewing the sampling clock property among the four ADC.

The four analog input, clock and trigger interfaces of the FMC254 are routed via SSMC connectors. The internal clock frequency is programmable and the clock is capable of locking to an external reference.

Key Features
  • Quad ADC09SJ1300 ADC 9-bit at 1.3GSPS
  • Full-Power input bandwidth: 6GHz
  • Full-Power Input bandwidth enables direct RF sampling of up to 4GHz
  • 4 JESD204C lanes from each ADC
  • FPGA Mezzanine Card (FMC+) per VITA 57.4
  • Excellent dynamic performance
  • Front panel interface includes CLK In and Trig In
Benefits
  • Ideal for Frequency Modulated Continuous Wave (FMCW) LiDAR systems
  • Compatible with a broad range of Xilinx and Altera based FMC carriers from VadaTech and others
  • Electrical, mechanical, software, and system-level expertise in house
  • Full system supply from industry leader
  • AS9100 and ISO9001 certified company
Specifications
Specifications

Block diagram

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